3 credit course
Focuses on modern digital design practice using computer-based design tools and then considers key steps in a modern design flow, with particular attention to the use of behavioral models in hardware description languages as a stepping stone to combinational and sequential logic synthesis. The Verilog language will be presented, along with ancillary topics of functional verification, testbench generation, timing analysis, fault simulation, and design for testability. Design examples will include microcontrollers, finite state machines for datapath control, serial and parallel communication protocol controllers, and typical architectures of synchronous computational units.
Prerequisites: ECE 2411. Meets with ECE 5242.
Lecture Notes - Available on Canvas
Lab Manuals - Available on Canvas
Last updated on 15th June 2024